|Elliott Sound Products||Project 194|
There are several difficulties associated with the phantom centre image produced by conventional (2 channel) stereo reproduction. This has been pointed out for example by Floyd Toole in Chapter 9 of his book 'Sound Reproduction'. It would be much better if that which is to be localised directly in front of the listener were reproduced by a loudspeaker system positioned there. My method of processing that I describe here derives a centre channel signal from the conventional pair of stereo signals for reproduction by a front centre speaker, while at the same time moderately reducing the level of the centre signal in the left and right channels.
Figure 1 shows what I will call a logic adder providing the means for increasing the level of the centre or common signal relative to that of those signals that are uncorrelated or randomly related and contained in or components of the pair of stereo channels. The inspiration for this was the AND gate composed of two diodes, a resistor, and a fixed DC voltage source.
Figure 1 - Level Passing At (a) And Attenuation At (b) By Logic Addition
In Figure 1, opamps U-A and U-C are configured as inverting half-wave rectifiers with a positive voltage output. The output termination of each of the two half-wave rectifiers is connected to the input terminal of a voltage follower. Opamps U-B and U-D are configured as voltage followers. The output terminals of the voltage followers are connected to the cathode of first and second diodes (Da and Db), and the anodes of the diodes Da and Db are connected to a first termination of a 10k resistor with the second termination of this resistor connected to +15VDC.
Figure 1A shows an identical audio AC signal at input to both half-wave rectifiers resulting in the instantaneous output voltage of both voltage followers equal to 1V. Both of diodes Da and Db are thus forward biased, and the output voltage of the circuit equals 1V plus a diode drop or 1.6V.
Figure 1B shows differing audio input signals at input to the first and second half-wave rectifiers. In this case, instantaneous voltage taken at the output terminals of opamps U-B and U-D can be only very momentarily equal. Given voltage taken at the output terminals of opamps U-B and U-D equal to respectively 1V and 3V, diode Da is forward biased while, as a result of forward biasing of diode Da, diode Db is reverse biased. The result is that voltage taken at the anodes of diodes Da and Db equals 1.6V.
For the circuit of Figure 1, where the signal at input to each of the two rectifiers are identical, then the output of the circuit is the inverted negative half-wave of the input signal plus a diode drop. Where first and second input signals are randomly related and both negative phase, then the instantaneous output voltage of the circuit of Figure 1 equals the amplitude of whichever of the two signals is the lesser. Still randomly related, if the first and second input signals are of opposite phase, then the output voltage of the circuit equals 0 Volts plus a diode drop. Thus it can be seen where the input signals to the logic adder of Figure 1 are identical, then the adder passes the input signal; where first and second input signals are randomly related, then attenuation occurs.
Figure 2 is a practical embodiment of the logic adder of Figure 1 providing a full-wave output. Opamps U1 and U5 configured as positive output half-wave rectifiers are complemented with opamps U3 and U7 configured as negative output half-wave rectifiers. To provide a full-wave output, resistors R11 and R13 connect respectively the anode of diode D7 and the cathode of diode D8 to the inverting input terminal of opamp U10 configured as an (linear) adder. The addition of the outputs of the two logic adders results in the cancellation of the opposite voltage diode drops. All diodes are 1N914, 1N4148 or similar low power high speed types.
Figure 2 - Logic Addition Of Figure 1 In A Practical Circuit (Two Required)
The processing circuit of Figure 2 also incorporates (linear) summation of the left and right channel input signals, and this summation is added to the summation of the outputs of two logic adders. Resistors R12 and R16 are the input resistors of opamp U9 configured as an adder, and the first and second channel inputs are connected to the opposite free ends of the two input resistors. Resistor R17 connects the output terminal of opamp U9 to the inverting input terminal of opamp U10. This is done to reduce the percentage of distortion in the signal taken at the output terminal of opamp U10 that is the output of the circuit.
A derived centre channel output is produced by the interconnection of the circuit of Figure 3 and first and second adders following the circuit of Figure 2. The circuit of Figure 3 includes lower octave and upper octave processing sections. Each section firstly has left channel ('Left') and right channel ('Right') inputs to first and second identical second order Linkwitz-Riley (LR) high-pass (HP) filters. Secondly, as shown in Figure 6, the output terminals of the high-pass filters of each section are connected to first and second input terminals of respectively first and second adders. Finally the output of each adder is connected to the input terminal of the 2nd order LR low-pass (LP) filter corresponding to the section of the circuit of Figure 3 that the input signals to the adder came from. The summation of the outputs of first and second LP filters of each of the sections of processing is accomplished by resistors R26 and R27 connected from the non-inverting input terminal of opamp U16 configured as a voltage follower to the output terminals of respectively opamps U15 and U17.
Figure 3 - High And Low Pass Filtering Before And After Logic Addition
In the lower octave processing section of the circuit of Figure 3, the component values of first and second HP filters including respectively opamps U13 and U14 are calculated according to a cut-off frequency of 480Hz. This was necessary to obtain as smooth as possible band-pass filtering in the range from 400Hz to 1,600Hz and to obtain -6 dB of roll-off at 400Hz. The component values of the LP filter including opamp U15 are calculated following a cut-off frequency of 800Hz.
In the higher octave processing section of Figure 3, the component values of first and second HP filters including respectively opamps U18 and U19 are calculated according to a cut-off frequency of 800Hz. The component values of the LP filter including opamp U17 are calculated according to a cut-off frequency of 1,300Hz so that band-pass filtering is relatively smooth and roll-off with respect to frequency equal to 1,600Hz equals -6 dB.
Closed loop gain (Acl) of the four half-wave rectifiers of Figure 2 equals 3.24. For example, in the case of the configuration of opamp U1, the ratio of the resistance of feedback resistor R4 to that of input resistor R1 equals 3.24.
In a computer simulation with the interconnected circuits of Figure 2 and 3 as shown in Figure 6, first and second input signals to jacks J1 and J2 of Figure 3 were sine waves of equal amplitude and frequency equal to 568Hz or one-half octave below the cut-off frequency of the LP filter including opamp U15 of Figure 3. When relative phase of the two input sine waves was changed from in-phase to 90° out of phase, this resulted in attenuation of the RMS voltage taken at the output terminal of opamp U15 by -6 dB. This showed that first and second uncorrelated or randomly related signals at input to jacks J1 and J2 are attenuated by -6 dB relative to the output level corresponding to the two signals at input being identical.
Making Acl of the half-wave rectifiers in the above simulation greater than 3.24 resulted in increased relative attenuation at a diminished rate. Thus it is thought that Acl of the half-wave rectifiers as given in Figure 2 is about optimum as Acl made greater than that would also increase the percentage of distortion in the output taken at RCA jack J3 of the circuit of Figure 3.
Figure 4 shows a method of cross feeding for lowering the level of the centre signal that is a component of the stereo left and right channel signals without substantially decreasing stereo separation. Figure 4 shows only one of the two legs of cross feeding required to attenuate the centre signal in both channels. Here a channel A is at input to a voltage divider consisting of resistors Ra and Rb that attenuates CH-A by the factor 0.28. The junction of resistors Ra and Rb is connected to the non-inverting input terminal of opamp U-E configured as a buffer. Resistor Rd connects the output terminal of opamp U-E to the inverting input terminal of opamp U-G configured as a subtracting amplifier. The opposite input signal channel B (CH-B) is buffered by opamp U-F the output terminal of which is connected to the non-inverting input terminal of opamp U-G by resistor Re. Given this arrangement, the signal component that is common to both channels or the centre signal in CH-B is attenuated by -3 dB, and the signal component in CH-A that is not common to both channels is inverted and added to CH-B at the attenuated level of -11 dB.
Figure 4- Inverted Cross Feeding To Attenuate Centre Signal In Opposite Channel
Figure 5 shows a practical implementation of the cross feeding scheme of Figure 4 and both legs of cross feeding. At the top of Figure 5, the buffered 'Left' signal taken from the output terminal of opamp U11 of Figure 3 is at input to a band-pass filter including opamps U20 and U21. The output terminal of U21 is connected to the non-inverting input terminal of opamp U22 by resistor R40. Resistor R43 connected from the non-inverting input terminal of opamp U22 to ground forms a voltage divider. Resistor R36 connects the output terminal of opamp U22 to the inverting input terminal of opamp U23 configured as a subtracting amplifier. The output terminal of opamp U23 (connected to output jack J4) is the 'Mod Right' output of the circuit of Figure 5 as resistor R41 connects the buffered 'Right' input to the non-inverting input terminal of opamp U23. The buffered 'Right' input is taken from the output terminal of opamp U12 of the circuit in Figure 3.
Figure 5 - Band-pass Filtered Inverted Cross Feeding
Cross feeding to the 'Left' to produce the 'Mod Left' output taken at jack J5 of the circuit of Figure 5 is accomplished in the identical fashion as cross feeding to the 'Right' except that the connection to the channel inputs is reversed. The bandwidth of band-pass filtering of first and second cross feeds equals 400Hz - 1,600Hz to match the bandwidth of the processing of the circuit of Figure 3, deriving a centre channel output. However the component values of the high-pass and low-pass filters of Figure 5 are calculated from cut-off frequencies of respectively 200Hz and 3,200Hz to achieve the actual range of cut-off from 400Hz- 1,600Hz. The four filters in Figure 5 are all LR second order. The voltage division factor in the cross feed of the circuit of Figure 5, because of phase shift introduced by the band-pass filters, is made equal to 0.46 to maintain adequate attenuation of the centre signal component. This is a decrease of attenuation relative to that of cross feeding of the circuit of Figure 4 equal to 0.28 and results in lessened stereo separation in the modified 'Left' and 'Right' outputs taken at jacks J4 and J5 of the circuit of Figure 5.
The completed processing circuitry involves interconnecting the circuits shown in Figures 2, 3 and 5. The interconnections, and connection of the processing circuit to amplifiers is shown in Figure 6. To start with, there is a stereo preamplifier with a volume control and 'Left' and 'Right' outputs of the preamp are connected to respectively input signal jacks J1 and J2 of the circuit of Figure 3. The input signals taken at jacks J1 and J2 are buffered by part of the circuit of Figure 3 and then inputted to the circuit of Figure 5. The modified stereo channel outputs of the circuit of Figure 5 taken at output jacks J4 and J5 are the inputs to power amplifiers 3 and 1 having an identical voltage gain.
Figure 6 - Interconnection Of The Sub-circuits Of Figures 2, 3 & 5 For Complete Processing
Processing to derive the centre channel requires interconnection of the circuit of Figure 3 with first and second adders, each adder following the schematic diagram of Figure 2. In Figure 6, the 'Left' and 'Right' high-pass outputs of the lower octave section of the circuit of Figure 3 are connected to first and second input terminals of a first adder. The output terminal of the first adder is connected to the Add-in connection point of the lower octave section of the circuit of Figure 3. In Figure 3, this is the free end of resistor R24. This is repeated with the high octave section of the circuit of Figure 3 where the "ADD-OUT" output of the second adder is connected to the 'Add-In' connection of the circuit of Figure 3 that being the free end of resistor R28.
The output of the processing circuit of Figure 3 taken from jack J3 as shown in Figure 6 is the input to power amplifier 2 with voltage gain equal to that of amplifiers 1 & 3. Power amplifier 2 drives a loudspeaker system located at the front and centre of the listening area. The three loudspeaker systems that are separately driven by the three power amplifiers are of equal sensitivity.
Relative to the level of the common component or centre signal in the 'Left' and 'Right' outputs taken from the preamplifier of Figure 6, the level of the centre signal taken at output jack J3 of Figs 3 & 6 is calculated as follows. Voltage gain as a result of processing by the circuit of Figure 2 equals closed loop gain of the half-wave rectifiers plus a gain of two by adding the centre signal in each of the two channels by the linear adder of Figure 2 including opamp U9. Thus,
dB = 20 × log ( Rf / Ri + 2 ) = 20 × log (3.24 + 2) = 14.4 dB
First and second band-pass filters of the circuit of Figure 3 were configured based on a simulation with that circuit omitting connection to the adders following Figure 2. For that simulation, referring to Figure 3, the output terminal of opamp U13 was connected to the free end of resistor R24, and the output terminal of opamp U19 was connected to the free end of resistor R28. Given an identical sine wave signal applied to input jacks J1 and J2, a simulated bode plot showed that average attenuation through the pass-band of 400Hz- 1,600Hz equaled -10.9 dB. Thus the extent to which the level of the centre signal taken at output jack J3 of the circuit of Figure 3 is increased, relative to its level at input to processing, equals +3.5 dB.
The level of the centre signal taken at output jacks J4 and J5 of Figure 5 relative to its level at input to processing equals on average - 3 dB. Thus the level of the centre signal taken at output jack J3 of Figure 3 with respect to its level taken at output jacks J4 and J5 equals +6.5 dB.
Next to consider is the level of the left signal component in the centre channel output (taken at jack J3 of the circuit of Figure 3) with respect to its level in the 'MOD-Left' output channel (taken at jack J5 of the circuit of Figure 5). The result equally applies when substituting 'Right' for 'Left' in the previous sentence, and then level at J3 is with respect to that at J4 of Figure 5. In a simulation, a sine wave signal of frequency equal to 568Hz is applied to first and second inputs of the circuit of Figure 2, 90° out of phase at one input relative to its phase at the other input. Further, the output terminal of the circuit of Figure 2 is connected to the free end of resistor R24 of Figure 3, that is, at input to the low-pass filter of the lower octave section of that figure. The result of the simulation is output voltage taken at the output terminal of opamp U15 of Figure 3 equal to 1.57 times that of the applied sine wave signal. Thus in the simulation, on average, the level of each of the two sine waves 90° out of phase is only slightly greater than the linear summation of the two signals. Linear summation of the two signals equals 1.41 times the equal level of each input.
The summing attenuator of the circuit of Figure 3, consisting of resistors R26 and R27 and opamp U16 configured as a voltage follower, decreases the outputs of the two sections of processing of Figure 3 each by -6 dB. Thus the level of the left (right) signal that is component of the centre channel is slightly greater than -6 dB with respect to its level in the modified 'Left' ('Right') output of the circuit of Figure 5.
Compared to the exceedingly simple 'processing' to obtain a centre channel by adding left and right channel signals, my circuit has the advantage of attenuating the left and right (uncorrelated) signals in the derived centre channel each by -6 dB. In the case of simple addition of the 'Left' and 'Right' signals, there is 0 dB of attenuation of the left (right) signal in the derived centre channel with respect to its level in the left (right) channel.
A recommended power supply for the processing circuit of Figure 6, not shown, is ±15V (bipolar), 100 mA. The opamps of my processing circuit that I constructed were TL072.
This is an original design by Peter Lehmann.
|Copyright Notice. This article, including but not limited to all text and diagrams, is the intellectual property of Peter Lehmann, edited by Rod Elliott, and is Copyright © 2019. Reproduction or re-publication by any means whatsoever, whether electronic, mechanical or electro- mechanical, is strictly prohibited under International Copyright laws. The author (Peter Lehmann) and editor (Rod Elliott) grant the reader the right to use this information for personal use only, and further allows that one (1) copy may be made for reference. Commercial use is prohibited without express written authorisation from Peter Lehmann and Rod Elliott.|